This technique relates to a semiconductor device and a method of manufacturing the same and, more particularly, to a semiconductor device having a plurality of types of transistors having different thicknesses of a gate insulating film, and a method of manufacturing the same.
Recently, a semiconductor device is proposed that a memory cell, a high-voltage transistor, an intermediate-voltage transistor, and a low-voltage transistor are mixedly provided on the same substrate.
In the proposed semiconductor device, the memory cell having a floating gate and a control gate with a stack gate structure is formed within a memory cell forming-region. Within a high-voltage transistor forming-region, the high-voltage transistor with a relatively high thickness of a gate insulating film is formed. Within an intermediate-voltage transistor forming-region, the intermediate-voltage transistor having a gate insulating film with a thickness lower than that of the gate insulating film of the high-voltage transistor is formed. Within a low-voltage transistor forming-region, the low-voltage transistor having a gate insulating film lower than that of the gate insulating film of the intermediate-voltage transistor is formed.
However, in the case of simply forming the memory cell, the high-voltage transistor, the intermediate-voltage transistor, and the low-voltage transistor, the height of a top surface of a device separating area in the high-voltage transistor forming region is lower than the height of a top surface of a device separating area in the memory cell forming region, the height of a top surface of a device separating area in the intermediate-voltage transistor forming region is lower than the height of the top surface of the device separating area in the high-voltage transistor forming region, and the height of a top surface of the device separating area in the low-voltage transistor forming region is lower than the height of the top surface of the device separating area of the intermediate-voltage transistor forming region. Therefore, the height of the top surface of the device separating area in the low-voltage transistor forming region is extremely lower than the height of the top surface of the device area in the low-voltage transistor forming region. When the height of the top surface of the device separating area in the low-voltage transistor forming region is extremely lower than the height of the top surface of the device area in the low-voltage transistor forming region, a low-voltage transistor having a gate electrode with a desired gate length cannot be formed, and a semiconductor device having preferable electrical characteristics cannot be provided.